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Add Microchip MEC1653B SoC, DTS, and board. #94009

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1 change: 1 addition & 0 deletions boards/microchip/mec_assy6941/Kconfig.mec_assy6941
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
# SPDX-License-Identifier: Apache-2.0

config BOARD_MEC_ASSY6941
select SOC_MEC1653B_NSZ if BOARD_MEC_ASSY6941_MEC1653B_NSZ
select SOC_MEC1743_QLJ if BOARD_MEC_ASSY6941_MEC1743_QLJ
select SOC_MEC1743_QSZ if BOARD_MEC_ASSY6941_MEC1743_QSZ
select SOC_MEC1753_QLJ if BOARD_MEC_ASSY6941_MEC1753_QLJ
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
# Copyright (c) 2025, Microchip Technology Inc.
# SPDX-License-Identifier: Apache-2.0

config BOARD_MEC_ASSY6941_MEC1653B_NSZ
select SOC_MEC1653B_NSZ
1 change: 1 addition & 0 deletions boards/microchip/mec_assy6941/board.yml
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@ board:
full_name: MEC17xxEVB ASSY6941
vendor: microchip
socs:
- name: mec1653b_nsz
- name: mec1743_qlj
- name: mec1743_qsz
- name: mec1753_qlj
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66 changes: 66 additions & 0 deletions boards/microchip/mec_assy6941/mec_assy6941_mec1653b_nsz.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,66 @@
/*
* Copyright (c) 2025, Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/

/dts-v1/;

#include <microchip/mec/mec5_mec1653bnsz.dtsi>
#include <microchip/mec5/mec1653b-nsz-b0-pinctrl.dtsi>

/ {
model = "Microchip MEC ASSY6941 MEC1753B-NSZ evaluation board";
compatible = "microchip,mec_assy6941-mec1653b_nsz";

chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart1;
rtimer-busy-wait-timer = &timer5;
};

power-states {
idle: idle {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
min-residency-us = <1000000>;
};

suspend_to_ram: suspend_to_ram {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-ram";
min-residency-us = <2000000>;
};
};
};

&cpu0 {
clock-frequency = <96000000>;
status = "okay";
cpu-power-states = <&idle &suspend_to_ram>;
};

/* Disable ARM SysTick kernel timer driver */
&systick {
status = "disabled";
};

/* Enable MCHP kernel timer driver using 32KHz RTOS timer and 1MHz basic timer */
&rtimer {
status = "okay";
};

/* We chose 32-bit basic timer 5 for use by ktimer */
&timer5 {
status = "okay";
};

&uart1 {
compatible = "microchip,mec5-uart";
status = "okay";
clock-frequency = <1843200>;
current-speed = <115200>;
pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
pinctrl-names = "default";
};
25 changes: 25 additions & 0 deletions boards/microchip/mec_assy6941/mec_assy6941_mec1653b_nsz.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
#
# Copyright (c) 2025, Microchip Technology Inc.
#
# SPDX-License-Identifier: Apache-2.0
#

identifier: mec_assy6941/mec1653b_nsz
name: MEC174X EVB ASSY 6941 with MEC1653B-NSZ
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 60
flash: 352
supported:
- gpio
- pinctrl
testing:
binaries:
- spi_image.bin
ignore_tags:
- bluetooth
- net
vendor: microchip
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
# Copyright (c) 2025, Microchip Technology Inc.
# SPDX-License-Identifier: Apache-2.0
#

CONFIG_GPIO=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
26 changes: 1 addition & 25 deletions dts/arm/microchip/mec/mec5.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -267,6 +267,7 @@
compatible = "microchip,xec-basic-timer";
reg = <0x40000ca0 0x20>;
interrupts = <141 0>;
girqs = <23 5>;
clock-frequency = <48000000>;
prescaler = <0>;
max-value = <0xffffffff>;
Expand Down Expand Up @@ -488,21 +489,6 @@
interrupts = <87 0>;
status = "disabled";
};
rcid0: rcid@40001400 {
reg = <0x40001400 0x80>;
interrupts = <80 0>;
status = "disabled";
};
rcid1: rcid@40001480 {
reg = <0x40001480 0x80>;
interrupts = <81 0>;
status = "disabled";
};
rcid2: rcid@40001500 {
reg = <0x40001500 0x80>;
interrupts = <82 0>;
status = "disabled";
};
bbled0: bbled@4000b800 {
reg = <0x4000b800 0x100>;
interrupts = <83 0>;
Expand All @@ -518,16 +504,6 @@
interrupts = <85 0>;
status = "disabled";
};
bbled3: bbled@4000bb00 {
reg = <0x4000bb00 0x100>;
interrupts = <86 0>;
status = "disabled";
};
bclink0: bclink@4000cd00 {
reg = <0x4000cd00 0x20>;
interrupts = <96 0>, <97 0>;
status = "disabled";
};
tfdp0: tfdp@40008c00 {
reg = <0x40008c00 0x10>;
status = "disabled";
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17 changes: 17 additions & 0 deletions dts/arm/microchip/mec/mec5/mec5_bclink.dtsi
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
/*
* Copyright (c) 2025 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/

/* From Microchip MEC5 MEC174x and onwards includes one instance of the
* BC-Link peripheral.
* Include this file in the soc {} section in the relevant chip DTSI files
*/
bclink0: bclink@4000cd00 {
reg = <0x4000cd00 0x20>;
interrupts = <96 3>, <97 3>;
interrupt-names = "bcm_err", "bcm_done";
girqs = <18 7>, <18 6>;
status = "disabled";
};
25 changes: 0 additions & 25 deletions dts/arm/microchip/mec/mec5/mec5_pkg176_uarts.dtsi

This file was deleted.

30 changes: 30 additions & 0 deletions dts/arm/microchip/mec/mec5/mec5_rcid.dtsi
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
/*
* Copyright (c) 2025 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/

/* From Microchip MEC5 MEC174x and onwards include three instances of the
* RC-ID peripheral.
* Include this file in the soc {} section in the relevant chip DTSI files
*/
rcid0: rcid@40001400 {
reg = <0x40001400 0x80>;
interrupts = <80 3>;
girqs = <17 10>;
status = "disabled";
};

rcid1: rcid@40001480 {
reg = <0x40001480 0x80>;
interrupts = <81 3>;
girqs = <17 11>;
status = "disabled";
};

rcid2: rcid@40001500 {
reg = <0x40001500 0x80>;
interrupts = <82 3>;
girqs = <17 12>;
status = "disabled";
};
48 changes: 48 additions & 0 deletions dts/arm/microchip/mec/mec5_mec1653bnsz.dtsi
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
/*
* Copyright (c) 2025 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <arm/armv7-m.dtsi>

#include "mec5.dtsi"

/ {
flash0: flash@b0000 {
reg = <0x000b0000 0x58000>;
};

sram0: memory@118000 {
compatible = "mmio-sram";
reg = <0x00118000 0xf800>;
};

soc {
#include "mec5/mec5_dma_chan20.dtsi"
#include "mec5/mec5_eeprom_8kb.dtsi"
#include "mec5/mec5_i3c.dtsi"

ps2_1: ps2@40009040 {
reg = <0x40009040 0x40>;
interrupts = <101 3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

kscan0: kscan@40009c00 {
reg = <0x40009c00 0x18>;
interrupts = <135 0>;
status = "disabled";
};

uart2: uart@400f2c00 {
reg = <0x400f2c00 0x400>;
interrupts = <183 2>;
clock-frequency = <1843200>;
current-speed = <115200>;
status = "disabled";
};
};
};
33 changes: 32 additions & 1 deletion dts/arm/microchip/mec/mec5_mec1743qlj.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -23,12 +23,43 @@
#include "mec5/mec5_gpspi_v2.dtsi"
#include "mec5/mec5_eeprom_8kb.dtsi"
#include "mec5/mec5_pkg176_pwms.dtsi"
#include "mec5/mec5_pkg176_uarts.dtsi"
#include "mec5/mec5_rcid.dtsi"
#include "mec5/mec5_bclink.dtsi"

ps2_1: ps2@40009040 {
reg = <0x40009040 0x40>;
interrupts = <101 3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

kscan0: kscan@40009c00 {
reg = <0x40009c00 0x18>;
interrupts = <135 0>;
status = "disabled";
};

bbled3: bbled@4000bb00 {
reg = <0x4000bb00 0x100>;
interrupts = <86 3>;
status = "disabled";
};

uart2: uart@400f2c00 {
reg = <0x400f2c00 0x400>;
interrupts = <183 2>;
clock-frequency = <1843200>;
current-speed = <115200>;
status = "disabled";
};

uart3: uart@400f3000 {
reg = <0x400f3000 0x400>;
interrupts = <184 2>;
clock-frequency = <1843200>;
current-speed = <115200>;
status = "disabled";
};
};
};
20 changes: 18 additions & 2 deletions dts/arm/microchip/mec/mec5_mec1743qsz.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -22,18 +22,34 @@
#include "mec5/mec5_dma_chan16.dtsi"
#include "mec5/mec5_gpspi_v2.dtsi"
#include "mec5/mec5_eeprom_8kb.dtsi"
#include "mec5/mec5_rcid.dtsi"
#include "mec5/mec5_bclink.dtsi"

ps2_1: ps2@40009040 {
reg = <0x40009040 0x40>;
interrupts = <101 3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

kscan0: kscan@40009c00 {
reg = <0x40009c00 0x18>;
interrupts = <135 0>;
status = "disabled";
};

bbled3: bbled@4000bb00 {
reg = <0x4000bb00 0x100>;
interrupts = <86 3>;
status = "disabled";
};

uart2: uart@400f2c00 {
reg = <0x400f2c00 0x400>;
interrupts = <183 1>;
interrupts = <183 2>;
clock-frequency = <1843200>;
current-speed = <38400>;
current-speed = <115200>;
status = "disabled";
};
};
Expand Down
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