boards: silabs: siwx91x: Expose real layout of the flash #93482
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The Network Coprocessor on SiWx91x owns a large part of the flash. Zephyr is not expected to access to theses areas. However, it is still technically possible to access these. In addition, we prefer the DTS contains a comprehensive and transparent description of the hardware. So update the DTS with the real partitioning of the SoC. Reference documentation is available here[1]. [1]: https://www.silabs.com/documents/public/application-notes/ an1416-siwx917-soc-memory-map.pdf Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
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Thanks for the real fix; I'll remove mine once this is merged. |
keith-packard
approved these changes
Jul 22, 2025
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Opening a new PR after the old one was reverted due to a CI failure.
The issue appeared from the merge of PR #92702 (comment), which introduced a new siwx917 SoC board with the "old" flash layout in DTS, while PR #93271 introduces the new flash layout.
To resolve this issue, I have fixed the flash layout of the new board in this PR as well.
This also resolves #93476 (tested on a real board).
I apologize for the inconvenience.
Old description:
The Network Coprocessor on SiWx91x owns a large part of the flash. Zephyr is not expected to access to theses areas.
However, it is still technically possible to access these. In addition, we prefer the DTS contains a comprehensive and transparent description of the hardware. So update the DTS with the real partitioning of the SoC.
Reference documentation is available here1.
an1416-siwx917-soc-memory-map.pdf