cmd/compile/internal/ssa: add codegen for Zicond extension on riscv64

src/cmd/compile/internal/riscv64/ssa.go

@@ -294,7 +294,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
 		ssa.OpRISCV64FADDD, ssa.OpRISCV64FSUBD, ssa.OpRISCV64FMULD, ssa.OpRISCV64FDIVD,
 		ssa.OpRISCV64FEQD, ssa.OpRISCV64FNED, ssa.OpRISCV64FLTD, ssa.OpRISCV64FLED, ssa.OpRISCV64FSGNJD,
 		ssa.OpRISCV64MIN, ssa.OpRISCV64MAX, ssa.OpRISCV64MINU, ssa.OpRISCV64MAXU,
-		ssa.OpRISCV64SH1ADD, ssa.OpRISCV64SH2ADD, ssa.OpRISCV64SH3ADD:
+		ssa.OpRISCV64SH1ADD, ssa.OpRISCV64SH2ADD, ssa.OpRISCV64SH3ADD,
+		ssa.OpRISCV64CZEROEQZ, ssa.OpRISCV64CZERONEZ:
 		r := v.Reg()
 		r1 := v.Args[0].Reg()
 		r2 := v.Args[1].Reg()

src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go

@@ -520,6 +520,10 @@ func init() {
 		//   ====+=============================
 		{name: "FCLASSS", argLength: 1, reg: fpgp, asm: "FCLASSS", typ: "Int64"}, // classify float32
 		{name: "FCLASSD", argLength: 1, reg: fpgp, asm: "FCLASSD", typ: "Int64"}, // classify float64
+
+		// RISC-V Integer Conditional (Zicond) operations extension
+		{name: "CZEROEQZ", argLength: 2, reg: gp21, asm: "CZEROEQZ"},
+		{name: "CZERONEZ", argLength: 2, reg: gp21, asm: "CZERONEZ"},
 	}
 
 	RISCV64blocks := []blockData{

src/cmd/compile/internal/ssa/_gen/RISCV64latelower.rules

@@ -23,3 +23,33 @@
 (SRAI [0] x) => x
 (SRLI [0] x) => x
 (SLLI [0] x) => x
+
+//  "Zicond" Extension for Integer Conditional Operations
+// (x == 0) ? x : y
+(CondSelect <t> x y (SEQZ x)) && buildcfg.GORISCV64 >= 23 => (CZEROEQZ <t> y x)
+// (z == 0) ? (x + y) : y
+(CondSelect <t> (ADD x y) x (SEQZ z)) && buildcfg.GORISCV64 >= 23 => (ADD x (CZERONEZ <t> y z))
+// (z != 0) ? (x + y) : y
+(CondSelect <t> (ADD x y) x (SNEZ z)) && buildcfg.GORISCV64 >= 23 => (ADD x (CZEROEQZ <t> y z))
+// (z == 0) ? (x - y) : y
+(CondSelect <t> (SUB x y) x (SEQZ z)) && buildcfg.GORISCV64 >= 23 => (SUB x (CZERONEZ <t> y z))
+// (z != 0) ? (x - y) : y
+(CondSelect <t> (SUB x y) x (SNEZ z)) && buildcfg.GORISCV64 >= 23 => (SUB x (CZEROEQZ <t> y z))
+// (z == 0) ? (x | y) : y
+(CondSelect <t> (OR x y) x (SEQZ z)) && buildcfg.GORISCV64 >= 23 => (OR x (CZERONEZ <t> y z))
+// (z != 0) ? (x | y) : y
+(CondSelect <t> (OR x y) x (SNEZ z)) && buildcfg.GORISCV64 >= 23 => (OR x (CZEROEQZ <t> y z))
+// (z == 0) ? (x ^ y) : y
+(CondSelect <t> (XOR x y) x (SEQZ z)) && buildcfg.GORISCV64 >= 23 => (XOR x (CZERONEZ <t> y z))
+// (z != 0) ? (x ^ y) : y
+(CondSelect <t> (XOR x y) x (SNEZ z)) && buildcfg.GORISCV64 >= 23 => (XOR x (CZEROEQZ <t> y z))
+// (z == 0) ? (x & y) : y
+(CondSelect <t> (AND x y) x (SEQZ z)) && buildcfg.GORISCV64 >= 23 => (OR (AND <t> x y) (CZEROEQZ <t> x z))
+// (z != 0) ? (x & y) : y
+(CondSelect <t> (AND x y) x (SNEZ z)) && buildcfg.GORISCV64 >= 23 => (OR (AND <t> x y) (CZERONEZ <t> x z))
+// (z == 0) ? x : y
+(CondSelect <t> x y (SEQZ z)) && buildcfg.GORISCV64 >= 23 => (OR (CZERONEZ <t> x z) (CZEROEQZ <t> y z))
+// (z != 0) ? x : y
+(CondSelect <t> x y (SNEZ z)) && buildcfg.GORISCV64 >= 23 => (OR (CZEROEQZ <t> x z) (CZERONEZ <t> y z))
+// Make sure we can rewrite all CondSelects.
+(CondSelect <t> x y cond) && buildcfg.GORISCV64 >= 23 => (OR (CZEROEQZ <t> x cond) (CZERONEZ <t> y cond))

src/cmd/compile/internal/ssa/branchelim.go

@@ -4,7 +4,10 @@
 
 package ssa
 
-import "cmd/internal/src"
+import (
+	"cmd/internal/src"
+	"internal/buildcfg"
+)
 
 // branchelim tries to eliminate branches by
 // generating CondSelect instructions.
@@ -24,6 +27,10 @@ func branchelim(f *Func) {
 	switch f.Config.arch {
 	case "arm64", "ppc64le", "ppc64", "amd64", "wasm", "loong64":
 		// implemented
+	case "riscv64":
+		if buildcfg.GORISCV64 < 23 {
+			return
+		}
 	default:
 		return
 	}