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projects/ad4630_fmc: Add VADJ values in READMEs #1781

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1 change: 1 addition & 0 deletions projects/ad4630_fmc/README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
- Evaluation board product page: [EVAL-AD4630-FMC](https://www.analog.com/eval-ad4630-24)
- System documentation: TO BE ADDED
- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad4630_fmc/index.html
- Evaluation board VADJ range: 1.2V - 3.3V

## Supported parts

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10 changes: 7 additions & 3 deletions projects/ad4630_fmc/zed/README.md
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@@ -1,5 +1,9 @@
<!-- no_no_os -->

# AD4630-FMC/ZED HDL Project

- VADJ with which it was tested in hardware: 2.5V

## Building the project

The parameters configurable through the `make` command, can be found below, as
Expand All @@ -21,7 +25,7 @@ The overwritable parameters from the environment are:

- CLK_MODE: clocking mode of the device's digital interface
- 0 - SPI (default)
- 1 - Echo-clock or Master clock
- 1 - Echo-clock or Master clock
- NUM_OF_SDI: the number of MOSI lines of the SPI interface
- 1 - Interleaved
- 2 - 1LPC
Expand All @@ -42,7 +46,7 @@ This specific command is equivalent to running `make` only:

```
make CLK_MODE=0 NUM_OF_SDI=4 CAPTURE_ZONE=2 DDR_EN=0
```
```

Corresponding device trees:
- [zynq-zed-adv7511-ad4630-24.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-ad4630-24.dts)
Expand All @@ -56,7 +60,7 @@ Corresponding device trees:
make CLK_MODE=0 NUM_OF_SDI=2 CAPTURE_ZONE=2 DDR_EN=0
```

Corresponding device trees:
Corresponding device trees:

- [zynq-zed-adv7511-ad4030-24.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-ad4030-24.dts)
- [zynq-zed-adv7511-ad4032-24.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-ad4032-24.dts)
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