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+ #
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+ # Copyright (c) 2025, Microchip Technology Inc.
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+ #
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+ # SPDX-License-Identifier: Apache-2.0
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+ #
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+
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+ zephyr_include_directories (${ZEPHYR_BASE} /drivers )
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+ zephyr_sources (soc.c )
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+ zephyr_include_directories (. )
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+
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+ set (SOC_LINKER_SCRIPT ${ZEPHYR_BASE} /include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "" )
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+ # Microchip MEC165XB MCU core series
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+
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+ # Copyright (c) 2025 Microchip Technology Inc.
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+ # SPDX-License-Identifier: Apache-2.0
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+
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+ config SOC_SERIES_MEC165XB
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+ select ARM
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+ select CPU_CORTEX_M4
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+ select CPU_CORTEX_M_HAS_DWT
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+ select CPU_HAS_ARM_MPU
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+ select HAS_SWO
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+ select HAS_MEC5_HAL
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+ select SOC_PREP_HOOK
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+ # Copyright (c) 2025 Microchip Technology Inc.
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+ # SPDX-License-Identifier: Apache-2.0
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+
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+ # Microchip MEC165xB MCU series configuration options
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+
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+ if SOC_SERIES_MEC165XB
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+
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+ config NUM_IRQS
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+ # must be >= the highest interrupt number used
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+ # - include the UART interrupts
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+ # All NVIC external sources.
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+ default 198
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+
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+ config CORTEX_M_SYSTICK
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+ depends on !MCHP_XEC_RTOS_TIMER
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+
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+ config SYS_CLOCK_HW_CYCLES_PER_SEC
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+ default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if CORTEX_M_SYSTICK
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+ default $(dt_node_int_prop_int,/soc/timer@40007400,clock-frequency) if MCHP_XEC_RTOS_TIMER
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+
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+ if MCHP_XEC_RTOS_TIMER
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+
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+ config SYS_CLOCK_TICKS_PER_SEC
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+ default $(dt_node_int_prop_int,/soc/timer@40007400,clock-frequency)
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+
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+ endif # MCHP_XEC_RTOS_TIMER
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+
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+ config ARCH_HAS_CUSTOM_BUSY_WAIT
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+ default y
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+
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+ endif # SOC_SERIES_MEC165XB
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+ # Copyright (c) 2025 Microchip Technology Inc.
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+ # SPDX-License-Identifier: Apache-2.0
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+
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+ # Microchip MEC165xB MCU core series
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+
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+ config SOC_SERIES_MEC165XB
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+ bool
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+ select SOC_FAMILY_MICROCHIP_MEC
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+ help
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+ Enable support for Microchip MEC Cortex-M4 MCU series
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+
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+ config SOC_SERIES
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+ default "mec165xb" if SOC_SERIES_MEC165XB
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+
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+ config SOC_MEC1653B_NSZ
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+ bool
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+ select SOC_SERIES_MEC165XB
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+
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+ config SOC
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+ default "mec1653b_nsz" if SOC_MEC1653B_NSZ
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+ /*
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+ * Copyright (c) 2025 Microchip Technology Inc.
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #include <zephyr/device.h>
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+ #include <zephyr/init.h>
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+ #include <zephyr/kernel.h>
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+ #include <soc.h>
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+ #include <soc_cmn_init.h>
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+
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+ void soc_prep_hook (void )
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+ {
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+ mec5_soc_common_init ();
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+ }
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+ /*
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+ * Copyright (c) 2025 Microchip Technology Inc.
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #ifndef __SOC_MICROCHIP_MEC_MEC165XB_SOC_H
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+ #define __SOC_MICROCHIP_MEC_MEC165XB_SOC_H
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+
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+ #define SYSCLK_DEFAULT_IOSC_HZ MHZ(96)
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+
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+ #ifndef _ASMLANGUAGE
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+
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+ #include "device_mec5.h"
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+
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+ /* common SoC API */
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+ #include "soc_dt.h"
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+ #include "soc_espi_channels.h"
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+ #include "soc_gpio.h"
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+ #include "soc_pcr.h"
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+ #include "soc_pins.h"
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+
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+ #endif
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+ #endif
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- name : mec15xx
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socs :
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- name : mec1501_hsz
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+ - name : mec165xb
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+ socs :
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+ - name : mec1653b_nsz
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- name : mec172x
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socs :
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- name : mec172x_nsz
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