bug fix: rounding mode (rm) must be calculated again before executing FP instruction during simulation

Author: gkothar1

src/riscvsim/core/inorder_backend.c

@@ -91,6 +91,7 @@ exec_insn_and_invalidate_rd(RISCVCPUState *s, INCore *core, InstructionLatch *e,
     }
 
     e->elasped_clock_cycles = 1;
+    e->ins.rm = get_insn_rm(s, (e->ins.binary >> 12) & 7);
     execute_riscv_instruction(&e->ins, &s->fflags);
     ++s->simcpu->stats[s->priv].fu_access[fu_type];
 }

src/riscvsim/core/ooo_backend.c

@@ -241,6 +241,7 @@ oo_core_execute_non_pipe(OOCore *core, int fu_type, CPUStage *stage)
         e = get_insn_latch(s->simcpu->insn_latch_pool, stage->insn_latch_index);
         if (!stage->stage_exec_done)
         {
+            e->ins.rm = get_insn_rm(s, (e->ins.binary >> 12) & 7);
             execute_riscv_instruction(&e->ins, &s->fflags);
 
             /* Update FU stats */
@@ -310,6 +311,7 @@ oo_core_execute_pipe(OOCore *core, int cur_stage_id, int fu_type, CPUStage *stag
         e = get_insn_latch(s->simcpu->insn_latch_pool, stage->insn_latch_index);
         if (!stage->stage_exec_done)
         {
+            e->ins.rm = get_insn_rm(s, (e->ins.binary >> 12) & 7);
             execute_riscv_instruction(&e->ins, &s->fflags);
 
             /* Update FU stats */