docs/ada4355: Update documentation

Signed-off-by: Pop Ioan Daniel <pop.ioan-daniel@analog.com>

Author: PIoandan

docs/library/axi_ada4355/index.rst

@@ -62,7 +62,7 @@ Interface
    * - fco_p
      - LVDS input positive side of differential data frame signal
    * - fco_n
-     - LVDS input negative side of differential data frame signal  
+     - LVDS input negative side of differential data frame signal
    * - dco_p
      - LVDS input positive side of differential reference clock signal
    * - dco_n
@@ -101,7 +101,7 @@ The axi_ada4355 operates as follows:
   a 1:8 ratio.
 * The LVDS data frame is also deserialized by the
   :git-hdl:`ad_serdes_in <library/xilinx/common/ad_serdes_in.v>` module with
-  a 1:8 ratio.  
+  a 1:8 ratio.
 * After deserialization, data is aligned using data_frame and a fixed pattern.
 
 Register Map
@@ -188,4 +188,4 @@ References
 * HDL project documentation at :ref:`ada4355_fmc`
 * :adi:`ADA4355`
 * :xilinx:`Zynq-7000 SoC Overview <support/documentation/data_sheets/ds190-Zynq-7000-Overview.pdf>`
-* :xilinx:`Zynq-7000 SoC Packaging and Pinout <support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf>`
+* :xilinx:`Zynq-7000 SoC Packaging and Pinout <support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf>`

docs/projects/ada4355_fmc/index.rst

@@ -10,7 +10,7 @@ The :adi:`ADA4355` is a complete, high performance, current input µModule.
 For space savings, the :adi:`ADA4355` includes all the  required active and
 passive components to realize a complete current to bits data acquisition
 solution, supporting a small form factor, optical modules as well as
-multichannel systems. 
+multichannel systems.
 
 The high speed transimpedance amplifier (TIA) of the device supports 10 ns pulse
 widths, allowing high spatial resolution for Time of Flight (ToF) measurements.
@@ -79,19 +79,18 @@ frame clock to all ISERDES instances.
 By default it is set to 0. Depending on the pinout, some hardware modifications
 need to be done on the board and/or ``make`` command:
 
-In case of the pinout with optimized xdc:
+In case of the pinout with optimized constraints:
 
 .. shell:: bash
 
    $make BUFMRCE_EN=0
 
-In case of the pinout with non optimized xdc:
+In case of the pinout with non-optimized constraints:
 
 .. shell:: bash
 
    $make BUFMRCE_EN=1
 
-
 CPU/Memory interconnects addresses
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
@@ -256,11 +255,9 @@ If you want to build the sources, ADI makes them available on the
 `clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
 the HDL repository.
 
-Examples on how to build the project:
-
 **Linux/Cygwin/WSL**
 
-Example for building with the default configuration:
+Example for building with the default configuration (BUFMRCE_EN=0):
 
 .. shell::
 
@@ -271,21 +268,17 @@ Example for building with parameters:
 
 .. shell::
 
-   $cd hdl/projects/ada4355_fmc/zed
-   $make BUFMRCE_EN=0
-
-Default values of the ``make`` parameters for ADA4355-FMC:
-
-- BUFMRCE_EN: 0
+   ~/hdl/projects/ada4355_fmc/zed
+   $make BUFMRCE_EN=1
 
 The result of the build, if parameters were used, will be in a folder named
 by the configuration used.
 
 If the following command was run
 
-``make BUFMRCE_EN=0``
+``make BUFMRCE_EN=1``
 
-then the folder name will be: ``BUFMRCEEN0``.
+then the folder name will be: ``BUFMRCEEN1``.
 
 Check `Configuration modes`_ for more details.
 
@@ -344,4 +337,4 @@ HDL related
 
 .. include:: ../common/more_information.rst
 
-.. include:: ../common/support.rst
+.. include:: ../common/support.rst