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lines changed Original file line number Diff line number Diff line change @@ -25,7 +25,7 @@ if(MSVC)
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add_compile_options ("/wd4324" )
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endif ()
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- project (astcencoder VERSION 5.2 .0 )
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+ project (astcencoder VERSION 5.3 .0 )
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set (CMAKE_CXX_STANDARD 14 )
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set (CMAKE_CXX_STANDARD_REQUIRED ON )
Original file line number Diff line number Diff line change @@ -6,6 +6,22 @@ release of the 5.x series.
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All performance data on this page is measured on an Intel Core i5-9600K
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clocked at 4.2 GHz, running ` astcenc ` using AVX2 and 6 threads.
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+ <!-- ---------------------------------------------------------------------- -->
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+ ## 5.3.0
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+ ** Status:** March 2025
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+
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+ The 5.3.0 release is a minor maintenance release.
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+ * ** General:**
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+ * ** Feature:** Reference C builds (` ASTCENC_ISA_NONE ` ) now support compiling
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+ for big-endian CPUs. Compile with ` -DASTCENC_BIG_ENDIAN=ON ` when compiling
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+ for a big-endian target; it is not auto-detected.
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+ * ** Bug fix:** Builds using MSVC ` cl.exe ` that do not specify an explicit
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+ ISA using the preprocessor configuration defines will now correctly
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+ default to the SSE2 backend on x86-64 and the NEON backend on Arm64. Previously they would have defaulted to the reference C implementation,
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+ which is around 3.25 times slower.
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+
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<!-- ---------------------------------------------------------------------- -->
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## 5.2.0
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